It’s been a long time since I wrote anything about the VHDL compiler and simulator I’m working on, nvc, but I am still developing it, albeit at a slightly slower pace than before.
Since the last update I’ve started making stable releases, and yesterday I released version 1.2.1. Actually I think most people are better off using the master branch: one thing I’m really proud of is the coverage of the regression tests, and they run on every commit using Travis so it should always be stable enough for everyday usage. The “stable” versioning is really to satisfy the requirements of packagers. For instance it is now part of Homebrew for OS X.
The big change in the last year has been the removal of the old hacky constant folding pass and replacing it with one based on the “vcode” intermediate code layer that I wrote about before. The old version used to walk over the AST nodes and attempt to collapse them into a simpler form by evaluating expressions and even evaluating function calls. Unfortunately this was often buggy and sometimes didn’t match the run-time result the code generator would have produced. Now constant folding is done using the same AST-to-vcode lowering pass the code generator uses, to generate vcode “thunks” for compile-time constant expression. These are then evaluated using a new vcode interpreter. This now means almost all side-effect free functions with constant arguments will be folded at compile time. Even those with complex looping, recursion, memory allocation, etc.
Unfortunately this rewrite took way longer than expected, partly due to not having much time to work on it, and partly because all the dependencies into the rest of the code got very complex.
Apart from that I’ve fixed a lot of bugs. And this means you can simulate some quite complex designs in it, for instance the J-Core open source SuperH CPU clone.