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Archives for August, 2022

New NVC version 1.7

August 7th, 2022

I’ve just released another version of my VHDL simulator. The highlight of this release is greatly improved VHDL-2008 support. It’s now sufficiently complete to run OSVVM, UVVM, and NEORV32.

A special thank you to Brian Padalino and T. Meissner for sponsoring me!

Download: nvc-1.7.0.tar.gz

This release is signed with my PGP key ID 74319F1A: nvc-1.7.0.tar.gz.sig

  • Breaking change: In-tree builds are no longer supported: use a separate build directory instead.
  • Breaking change: The --force-init command is deprecated and has no effect.
  • Added support for VHDL-2008 type generics on packages and entities.
  • Diagnostic messages have been enhanced with more contextual information.
  • Added support for record element constraints and record fields with unconstrained array types.
  • Alias of multidimensional array allowed in VHDL-2008 mode.
  • Implemented VHDL-2008 rules for aggregates with slices.
  • VHPI is now always enabled at build time and the --enable-vhpi configure option has no effect.
  • Arithmetic operations that overflow the underlying machine type now produce an error (#101).
  • Added support for VHDL-2008 force/release assignments.
  • Basic support for external names in VHDL-2008.
  • Matching case case? statements are supported in VHDL-2008 mode.
  • Fixed several bugs in the implementation of guarded signals.
  • Implemented VHDL-2008 rules for generic visibility.
  • Shared variable declaration permitted in entity declaration.
  • Case expression no longer requires a locally static subtype in VHDL-2008 mode (#460).
  • The VHDL heap is now garbage collected as required by VHDL-2019 and the deallocate operator has no effect other than setting the access to null.
  • A new global option -H specifies the size of the simulation heap and defaults to 16 megabytes.
  • Concurrent procedure call allowed in entity statement part.
  • Added support for 'SUBTYPE and 'ELEMENT attributes in VHDL-2008.
  • The new top-level --init command creates a new empty library directory.
  • The -a analysis command now reads from the standard input if the file name is -.
  • Added support for array element constraints in VHDL-2008.
  • The --prefer-explicit analysis option which was deprecated before the 1.0 release has been removed.
  • A new --relaxed analysis option enables “relaxed rules” mode. This has the same effect as enabling all the existing --relax= options. However some constructs will still produce warnings.
  • The --relax= analysis option is deprecated and is now equivalent to passing --relaxed. The individual options are ignored.
  • Added support for generic subprograms in VHDL-2008.
  • New command --install allows easy installation of common third-party packages such as OSVVM and UVVM.
  • Identifiers in waveform dumps are now in lower case instead of upper case.
  • The function CURRENT_DELTA_CYCLE in NVC.SIM_PKG can be used to query the current delta cycle number.

Saltwood Castle

August 3rd, 2022

I went for a walk last weekend near Folkestone and to my surprise I discovered a castle!

It’s Saltwood castle and is, somewhat incredibly, someone’s private residence so you can’t go inside which is a shame.