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Archives for vhdl

New NVC version 1.11.0

December 6th, 2023

This is a major new release with much improved support for VHDL-2019. Consult the features page for the current status of each LCS. This release also brings full support for cocotb!

Download: nvc-1.11.0.tar.gz

This release is signed with my PGP key ID 74319F1A: nvc-1.11.0.tar.gz.sig

  • New command --cover-export exports coverage data in the Cobertura XML format which is supported by most CI environments such as GitLab.
  • Generics on internal instances can now be overridden with the -g elaboration option. For example -g uut.value=42.
  • Implemented the 'reflect attribute and associated protected types from VHDL-2019.
  • Added support for VHDL-2019 sequential block statements.
  • Implemented the VHDL-2019 directory I/O functions in std.env.
  • Added VHDL-2019 assert API (with @Blebowski).
  • Implemented 'image, 'value and to_string for composite types in VHDL-2019.
  • Implemented the “closely related record types” feature from VHDL-2019.
  • Implemented the “composition with protected types” feature from VHDL-2019.
  • The new --shuffle option runs processes in a random order which can help to identify code that depends on a particular execution order.
  • Updated to OSVVM 2023.07 for nvc --install.
  • Various enhancements and fixes to the VHPI implementation.
  • Implemented the VHDL-2019 changes to instance_name and path_name for protected type variables.
  • VHPI error messages are no longer reported as diagnostic messages on the console. The new --vhpi-debug option restores the old behaviour.
  • Support for type conversions between arrays with closely related element types.
  • Added support for FSM state coverage collection (from @Blebowski).
  • An alias of a type now correctly creates implicit aliases for each predefined operator of that type (#776).
  • Improve overload resolution where a partial named association implies the formal parameter must be an array (#793).
  • Handling of implicit conversion for universal types has been reworked to better comply with the LRM.
  • Fixed a crash when string literal characters have a type which is an alias to another type (#801).
  • Added a warning when calling the predefined "=" and "/=" operators on arrays and the left and right hand sides have different lengths.
  • Expressions like abs(x)**2.0 are now parsed correctly (#805).

Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @nv-h for sponsoring me!

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New NVC version 1.10.0

July 14th, 2023

The main focus of this release was VHDL-2019 support. Consult the features page for the current status of each LCS. If there is a VHDL-2019 feature you find particularly useful please raise an issue so it can be prioritised.

Download: nvc-1.10.0.tar.gz

This release is signed with my PGP key ID 74319F1A: nvc-1.10.0.tar.gz.sig

  • The Zstandard compression library is now a build dependency. Install libzstd-dev or similar.
  • The integer type is now 64-bit in VHDL-2019 mode.
  • The VUnit VHDL libraries can now be installed with nvc --install vunit but please note this does not install the Python infrastructure.
  • Updated to OSVVM 2023.05 and UVVM 2023.03.21 for nvc --install.
  • Conditional expressions are now allowed in constant, signal, and variable declarations in VHDL-2019 mode.
  • Conditional return statements are now supported in VHDL-2019.
  • Added support for the “function knows vector size” feature in VHDL-2019.
  • Entity ports with variable class and protected type are now supported in VHDL-2019 mode.
  • The xpm_vhdl project which provides VHDL models of the Xilinx XPM macros can now be installed with nvc --install xpm_vhdl.
  • Many improvements to the VHPI implementation (from @Forty-Bot).
  • vhpi_put_value with vhpiDepositPropagate mode is now supported.
  • The Synopsys std_logic_misc package is now compiled for 2008 (#696).
  • Fixed an issue where leading NUL characters in a report message would prevent the entire message being printed (#700).
  • Added support for interfaces in VHDL-2019 including mode view declarations, mode view indications, and the 'converse attribute.
  • Added support for VHDL-2008 matching select? statements (#705).
  • Added support for the new 'designated_subtype and 'index attributes in VHDL-2019.
  • Implemented the date/time functions from std.env in VHDL-2019.
  • The default exit severity was changed from error to failure. This means a failing assertion no longer immediately terminates the simulation. The old behaviour can be restored with --exit-severity=error.
  • Comparison operators as well as minimum/maximum functions are now defined for all scalar array types in VHDL-2019.
  • Added support for selected signal and variable sequential assignment statements.
  • The -a analysis command now accepts an -f list option where list is a text file containing a list of files to analyse. Alternatively this may be written @list.
  • Accesses to protected types and files are now allowed in VHDL-2019.
  • Fixed a crash when indexing a null array (#734).
  • Named and range choices are now supported in aggregate targets of variable and signal assignments (#712).
  • The synopsys.attributes package is no longer distributed or built as part of the standard libraries.

Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, and @ikwzm for sponsoring me!

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New NVC version 1.9.0

April 7th, 2023

This is a major new release with the following changes:

Download: nvc-1.9.0.tar.gz

This release is signed with my PGP key ID 74319F1A: nvc-1.9.0.tar.gz.sig

  • Code generation has been rewritten to enable faster elaboration and “just-in-time” compilation in the future.
  • Now compatible with LLVM 16.
  • Implemented the VHDL-2019 call path reporting API.
  • The elsif VHDL-2019 conditional analysis directive now works correctly (#604).
  • The 'transaction implicit signal no longer incurs a delta-cycle delay.
  • x'ascending now reports the correct result if x has unconstrained array type and null range.
  • The predefined "=" operator on record types now always uses the predefined equality comparison for fields even in the presence of a user-defined "=" operator.
  • It is no longer necessary on Windows to link VHPI plugins at elaboration time with NVC_FOREIGN_OBJ. Use the --load option to load the plugin at run time as on other operating systems.
  • The experimental --jit elaboration option defers native code generation until run time. This can dramatically reduce total test time for short-running simulations.
  • Statements like wait for X where X is negative but not a constant now produce an error at run time (#633).
  • NVC is now supported by VUnit.
  • Implicit signal attributes like 'transaction are now considered static signal names (#640).
  • Added support for fine-grained coverage collection via --coverage-spec elaboration option (from @Blebowski).
  • The ABI for passing unconstrained arrays to foreign subprograms changed slightly, see the manual for details.
  • Implemented new file I/O operations from VHDL-2019.
  • Added analysis option --define to set user-defined conditional analysis identifiers (from @Blebowski).
  • Optional support for using ZSTD to compress library files if libzstd-dev is installed.
  • ISO-8859-1 extended characters are now handled properly in identifiers and when printing to the terminal.
  • The new configure option --disable-default-paths disables the default library search paths (#652).
  • Subtype indications used as case range choices no longer crash during analysis (#655).
  • The default standard version was changed to VHDL-2002 and will likely change again to -2008 in a future release. Users are recommended to use the --std= option to specify an explicit standard revision to avoid any compatibility issues.
  • Fixed a crash when elaborating a port map which contains a subtype of a record (#662).
  • Implemented VHDL-2019 syntax relaxations for empty records and trailing semicolon in interface lists (from @bpadalino).
  • A Bash auto-completion script is now installed by default. Run configure with --without-bash-completion to disable this.

Special thank you to @bpadalino, @tmeissner, @Blebowski, and @amb5l for sponsoring me!

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New NVC version 1.8.0

January 22nd, 2023

This is a major new release with many improvements and bug fixes, especially for VHDL-2008 features.

Download: nvc-1.8.0.tar.gz

This release is signed with my PGP key ID 74319F1A: nvc-1.8.0.tar.gz.sig

  • The --disable-opt and --native elaborate options which were deprecated in version 1.3 have been removed.
  • The JSON dumper which was unmaintained for several years has been removed.
  • VHDL-2019 mode can be enabled with --std=2019. Please note there is very limited support for this standard at present.
  • The new --no-save elaboration option skips saving the elaborated design and other generated files to the working library.
  • Added support for else and elsif in generate statements (#510).
  • Xilinx Vivado vendor libraries can now be compiled with nvc --install vivado.
  • LLVM 8.0 or later is now required due to deprecation of non-opaque pointers.
  • Altera/Intel Quartus vendor libraries can now be compiled with nvc --install quartus.
  • The nvc --version output now includes the commit hash if built from a Git checkout.
  • The new --gtkw run option writes a .gtkw save file for GtkWave containing all the signals in the design (suggested by @amb5l).
  • libffi is now a build-time dependency.
  • Negation of the smallest negative value of a type such as -integer'left now produces an error.
  • Default OSVVM version updated to 2022.11.
  • case .. generate statements are now supported in VHDL-2008.
  • Coverage implementation was reworked and now collects statement, branch, expression and toggle metrics (from @Blebowski).
  • The --make command is deprecated and will be repurposed in a later release. Use the new --print-deps command instead to generate Makefile dependencies.

Special thank you to @bpadalino, @tmeissner, @Blebowski, and @amb5l for sponsoring me!

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New NVC version 1.7

August 7th, 2022

I’ve just released another version of my VHDL simulator. The highlight of this release is greatly improved VHDL-2008 support. It’s now sufficiently complete to run OSVVM, UVVM, and NEORV32.

A special thank you to Brian Padalino and T. Meissner for sponsoring me!

Download: nvc-1.7.0.tar.gz

This release is signed with my PGP key ID 74319F1A: nvc-1.7.0.tar.gz.sig

  • Breaking change: In-tree builds are no longer supported: use a separate build directory instead.
  • Breaking change: The --force-init command is deprecated and has no effect.
  • Added support for VHDL-2008 type generics on packages and entities.
  • Diagnostic messages have been enhanced with more contextual information.
  • Added support for record element constraints and record fields with unconstrained array types.
  • Alias of multidimensional array allowed in VHDL-2008 mode.
  • Implemented VHDL-2008 rules for aggregates with slices.
  • VHPI is now always enabled at build time and the --enable-vhpi configure option has no effect.
  • Arithmetic operations that overflow the underlying machine type now produce an error (#101).
  • Added support for VHDL-2008 force/release assignments.
  • Basic support for external names in VHDL-2008.
  • Matching case case? statements are supported in VHDL-2008 mode.
  • Fixed several bugs in the implementation of guarded signals.
  • Implemented VHDL-2008 rules for generic visibility.
  • Shared variable declaration permitted in entity declaration.
  • Case expression no longer requires a locally static subtype in VHDL-2008 mode (#460).
  • The VHDL heap is now garbage collected as required by VHDL-2019 and the deallocate operator has no effect other than setting the access to null.
  • A new global option -H specifies the size of the simulation heap and defaults to 16 megabytes.
  • Concurrent procedure call allowed in entity statement part.
  • Added support for 'SUBTYPE and 'ELEMENT attributes in VHDL-2008.
  • The new top-level --init command creates a new empty library directory.
  • The -a analysis command now reads from the standard input if the file name is -.
  • Added support for array element constraints in VHDL-2008.
  • The --prefer-explicit analysis option which was deprecated before the 1.0 release has been removed.
  • A new --relaxed analysis option enables “relaxed rules” mode. This has the same effect as enabling all the existing --relax= options. However some constructs will still produce warnings.
  • The --relax= analysis option is deprecated and is now equivalent to passing --relaxed. The individual options are ignored.
  • Added support for generic subprograms in VHDL-2008.
  • New command --install allows easy installation of common third-party packages such as OSVVM and UVVM.
  • Identifiers in waveform dumps are now in lower case instead of upper case.
  • The function CURRENT_DELTA_CYCLE in NVC.SIM_PKG can be used to query the current delta cycle number.

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VHDL generic subprograms

June 25th, 2022

I recently added support for VHDL-2008 generic subprograms to NVC. As far as I know it’s the first open source VHDL simulator to support them and allows you to write type-generic functions and procedures like this:

function fact generic (type t;
                       function "*"(l, r : t) return t is <>;
                       function "-"(l, r : t) return t is <>;
                       function "<"(l, r : t) return boolean is <>;
                       one : t)
        (n : t) return t is
begin
    if n < one then
        return one;
    else
        return n * fact(n - one);
    end if;
end function;

And then make concrete instances of the generic function:

function fact_int is new fact
    generic map (t => integer, one => 1);
function fact_real is new fact
    generic map (t => real, one => 1.0);

The is <> syntax in the declaration above picks up the default *, -, and < operators for that type from the context so there’s no need to specify them in the generic map.

assert fact_int(5) = 120;
assert fact_real(4.0) = 24.0;

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Major new NVC version 1.6.0

January 25th, 2022

Recently I’ve been doing a lot of work on my VHDL simulator and I’ve just released the first new major version in over a year and a half.

Download: nvc-1.6.0.tar.gz

This release is signed with my PGP key ID 74319F1A: nvc-1.6.0.tar.gz.sig

This release contains many improvements and bug fixes detailed below, but the highlights are much improved language support, especially for configurations and some VHDL-2008 features, as well as better debugging support.

  • Name resolution and overload resolution has been completely rewritten which should fix a number of long-standing issues.
  • The elaboration phase was largely written which fixes a number of long-standing issues and significantly improves elaboration speed.
  • VHDL-2008 IEEE standard libraries are now built and installed in addition to the VHDL-1993 libraries.
  • The VHDL-1993 standard libraries are now derived from the Apache 2.0 licensed sources from VHDL-2019.
  • There is now a project website at https://www.nickg.me.uk/nvc/. Please link to this in preference to the GitHub project page.
  • Compiled VHDL code now includes DWARF debug information which is used for runtime stack trace if libdw or libdwarf is installed.
  • Added support for VHDL-2008 reduction operators, match operators, and condition conversion.
  • Added support for VHDL-2008 element resolution.
  • Variable assignment now supports aggregate targets.
  • The --relax=impure option allows pure functions to call impure functions.
  • Added support for VHDL-2008 “all” sensitised processes.
  • Added support for ports and generics in block statements.
  • Added support for the ’BASE attribute.
  • Type name now allowed in element association choice (#407).
  • Implement textio READ procedure for REAL.
  • LLVM 6.0 or later is now required to build.
  • Added support for MINIMUM, MAXIMUM, and TO_STRING predefined operators in VHDL-2008.
  • VCD files are now generated from FST data in a similar manner to fst2vcd(1). This should improve compatibility with other tools.
  • Added support for ’LAST_ACTIVE attribute (#423).
  • Added support for ’DRIVING and ’DRIVING_VALUE attributes.
  • Added a new option --ieee-warnings=off to disable warning messages from the standard IEEE packages.
  • Support for configurations has been significantly improved (#372).
  • Added support for VHDL-2008 delimited comments.
  • Added support for guard expressions on blocks.
  • Added support for guarded signals.
  • Added support for HREAD, HWRITE, and other TEXTIO additions in VHDL-2008.
  • Code generation now happens in parallel when LLVM is built with multi-threading enabled.
  • Link time optimisation (LTO) is now enabled for release builds where supported.
  • The default assertion failure message for certain simple scalar comparisons now shows the values of the left and right hand sides.
  • Added support for VHDL-2008 conditional variable assignment statements.
  • Added support for VHDL-2008 extended bit string literals.
  • Non-globally-static actuals allowed in port maps in VHDL-2008 mode.
  • Added support for VHDL-2008 sequential conditional signal assignment statements.
  • Added basic support for package generics and package instantiation.
  • Nested arrays can now be included in the waveform dump but only if the --dump-arrays option is passed. This is disabled my default due the significant performance and memory overhead.
  • Added support for record types in waveform dump (#216).
  • Added support for foreign subprograms using the VHPIDIRECT protocol.
  • Library build is now reproducible when running make -j.
  • Fix a constant folding crash with nested records.
  • Fixed a crash when a record aggregate contains an “others” association and the fields have array types with different lengths.
  • Fixed a stack overflow when a subprogram with unconstrained array arguments is called repeatedly in a loop (#414).
  • Fixed intermittent crash when evaluating nested constant records (#425).
  • Fixed missing import libraries on Windows (#424).
  • Standard libraries are now installed under $prefix/lib/nvc/ instead of $prefix/share/nvc.
  • New configure option --disable-vital disables building the VITAL packages whose license status is unclear.
  • Support for the LXT wave output format, which was deprecated in version 1.5, has been removed. Use the default FST format instead.
  • The fetch-ieee.sh script which did nothing since the last release has been removed.
  • The --codegen command, which has been deprecated since 1.3, was removed.
  • The --profile option now prints internal simulation statistics instead of the top processes by CPU time.

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New NVC version 1.5.3

November 13th, 2021

I’ve released a new version 1.5.3 of NVC, the VHDL compiler I’m working on. This is hopefully the final bug fix release on the 1.5 branch containing the following changes back-ported from the development branch:

  • Handle access(2) returning EPERM in macOS sandbox.
  • Fix race when multiple processes concurrently update a library.
  • Fix --syntax command when file contains multiple design units.
  • Allow constant folding of nand/nor/xor/xnor.
  • Fix potential out of memory condition when evaluating complex assert expressions.
  • Fix incorrect result of mod operator with negative operands.
  • Fixed intermittent crash when evaluating nested constant records.
  • Buffer too small for printing TIME’HIGH.

nvc-1.5.3.tar.gz
nvc-1.5.3.tar.gz.sig

This release is signed with GPG key fingerprint 0784 505A DB5D 7D86 D2BD E6DA BCDB 295F 7431 9F1A. Download both the .sig and .tar.gz files and verify with:

gpg --keyserver pgp.mit.edu --recv-keys BCDB295F74319F1A
gpg --verify nvc-1.5.3.tar.gz

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New NVC version 1.5.2

July 28th, 2021

I’ve released a new version 1.5.2 of the VHDL compiler I’m working on. This is the second bug fix release on the 1.5 branch containing the following changes back-ported from the development branch:

  • Link libexecinfo on FreeBSD.
  • Implement textio READ procedure for BIT and TIME.
  • Fixed a crash when a long running procedure suspends in a loop.
  • Fix static linking with LLVM 12.0.
  • Fix crash when assigning to a signal declared in a package.
  • Fix incorrect recording of dependencies which caused a failure to load generated DLLs on Windows.
  • Fix file locking error when a library is located on NFS.
  • Optimise loading large library index from disk.
  • Fix a crash when using ‘VALUE with enumeration subtypes.
  • Fix a crash when a signal with more than 256 elements is declared in a package.

nvc-1.5.2.tar.gz
nvc-1.5.2.tar.gz.sig

This release is signed with GPG key fingerprint 0784 505A DB5D 7D86 D2BD E6DA BCDB 295F 7431 9F1A. Download both the .sig and .tar.gz files and verify with:

gpg --keyserver pgp.mit.edu --recv-keys BCDB295F74319F1A
gpg --verify nvc-1.5.2.tar.gz

There is now a public git mirror at https://git.nickg.me.uk/nvc.git if you prefer not to use GitHub.

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NVC Version 1.5

July 19th, 2020

I’m pleased to announce a new version of nvc, the VHDL simulator I’ve been working on for the best part of a decade now. I haven’t added any major new features recently but I’ve fixed several bugs listed below, and also updated the code generation to be compatible with LLVM 7 and later. Due to a licensing change the IEEE standard library sources can now be redistributed, but note that distributing modifications is not permitted so these are truly free software.

  • IEEE library sources are now distributed
  • Updated FST library to match GtkWave 3.3.79
  • The LXT wave output format is deprecated, use FST instead
  • Fix incorrect file name in assertion message
  • Fix crash while recovering from parse error
  • Add --dump-json command to print AST as JSON (from Sebastien Van Cauwenberghe)
  • Fix crash when using LLVM 7 and later
  • Fix spurious assertion failure in std.textio.readline
  • Reals are now rounded to the nearest integer as specified by the LRM
  • Fix crash when constant folding uses too much memory
  • Improved memory management in evaluator (thanks to Frank Mori Hess)
  • Various other minor fixes and improvements

Download the source package here: nvc-1.5.tar.gz.

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