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Archives for 2012


June 25th, 2012

One of life’s little tragedies.

Well at least the sun’s come out now. This is a pretty church tower in Hambleden.

Haven’t posted many photos recently so here’s one of some wavy grass.

Also corn. Can’t forget the corn. Nice clouds too.

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Bodiam Castle

June 3rd, 2012

A cloudy bank holiday weekend seems the perfect occasion to spend the day wandering around a National Trust property with the family. So off we went to Bodiam Castle yesterday. This has got to be one of my favorite castles: it’s so cute and well formed! Somewhat like Skipton Castle. Some photos I took:

Green Bug

May 27th, 2012

Maybe some kind of grasshopper? Saw it on the balcony today in the sun.

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May 18th, 2012

After being a little sceptical about our corporate day out to Thorpe Park I was pleasantly surprised by it being totally epic.

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Stopped Raining

May 14th, 2012

Finally it was sunny enough to go walking on Saturday. So I went adventuring in previously unexplored territory near Princes Risborough. Tried unsuccessfully to get a tan, instead I ended up with lots of nettle stings :-(. Here’s some generic pleasant countryside:

Also, a cute little church:

Xcowsay on Raspberry Pi

May 2nd, 2012

Xcowsay fans rejoice! Xcowsay is now officially supported on the Raspberry Pi!

In other news I’ve started updating xcowsay to use Gtk3 and Cario. Expect version 1.4 later in the year!

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Mysterious Component

May 1st, 2012

I thought managing over two years without washing machine malfunction was too good to be true. And lo it was. This time a mysterious banging noise was caused by these as yet unidentified components:

Foolishly I forgot to ask the engineer what the problem was so washing machine lore has not grown. I’m pretty sure they’re not the infamous Carbon Brushes anyway. Answers on a postcard…

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Olympic Park

May 1st, 2012

For reasons vaguely connected with my day job I found myself at a soiree at a certain marketing suite on the Olympic Park last Thursday. The less said about the event itself the better but I did manage to get a look at the nearly finished venues:

Photo sucks as I only had my phone with me. I suspect this is the closest I’ll be getting to the Olympics this year.

Portable high resolution timestamps from stat

April 21st, 2012

A small nugget of information that might be useful to someone:

The standard timestamps in struct stat have type time_t which only gives a resolution of seconds which is less than required in many situations. Luckily most operating systems provide a higher resolution timestamp within struct stat but the field name differs among Linux, BSD, etc. On Linux you can get at this with st_mtim.tv_nsec and on BSD it is st_mtimespec.tv_nsec (this also works for OS X).

With autoconf you can use something like:

AC_CHECK_MEMBERS([struct stat.st_mtimespec.tv_nsec])
AC_CHECK_MEMBERS([struct stat.st_mtim.tv_nsec])

And then later you can pull the nanoseconds out of the timestamp with:

   ns = st.st_mtimespec.tv_nsec;
   ns = st.st_mtim.tv_nsec;
   ns = 0;

This works the same way for atime and ctime as well as mtime. Make sure to handle the #else case as some systems (Cygwin?) don’t have this at all.

VHDL compiler improvements

April 15th, 2012

A while ago I posted about a VHDL compiler I’d started writing. Well I’ve been working on it a bit during the evenings and weekends and it’s acquired several new features. Probably the most significant is that it can now compile the standard IEEE std_logic_1164 and numeric_std packages as well the Synopsys std_logic_arith and std_logic_unsigned packages. If you clone the latest version from GitHub these will be built and installed for you automatically. Note that the original IEEE sources cannot be redistributed due to copyright restrictions so you’ll have to faff about downloading them from the IEEE standards website first – see lib/ieee/README for details.

NVC also now supports a wider range of concurrent statements, including selected and conditional assignments.

This means we can rewrite the counter example from before in a more normal way:

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity counter is
    generic ( WIDTH : integer );
    port (
        clk   : in std_logic;
        reset : in std_logic;
        count : out unsigned(WIDTH - 1 downto 0) );
end entity;
architecture rtl of counter is
    signal count_r : unsigned(WIDTH - 1 downto 0);
    count <= count_r;
    process (clk) is
        if rising_edge(clk) then
            if reset = '1' then
                count_r <= (others => '0');
                count_r <= count_r + 1;
            end if;
        end if;            
    end process;
end architecture;

And similarly for the top-level test bench:

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity counter_tb is end entity;
architecture test of counter_tb is
    constant WIDTH : integer := 16;
    signal clk     : std_logic := '0';
    signal reset   : std_logic := '1';
    signal count   : unsigned(WIDTH - 1 downto 0);
    clk   <= not clk after 5 ns;
    reset <= '0' after 10 ns;
    uut: entity work.counter
        generic map ( WIDTH )
        port map ( clk, reset, count );    
end architecture;

Next we have to analyse and elaborate the design:

$ nvc -a counter.vhd
$ nvc -e counter_tb
/usr/lib/llvm-3.0/bin/llvm-ld -r -b /home/nick/nvc/build/work/_WORK.COUNTER_TB.final.bc /home/nick/nvc/build/work/_WORK.COUNTER_TB.elab.bc /home/nick/share/nvc/ieee/_IEEE.NUMERIC_STD-body.bc /home/nick/share/nvc/ieee/_IEEE.STD_LOGIC_1164-body.bc

The long llvm-ld line at the end is a new stage that links together the LLVM bitcode for the elaborated design with the bitcode for any referenced packages – the IEEE standard libraries in this case. This allows LLVM’s link time optimisation to optimise across package boundaries. For example, inlining trivial functions like rising_edge directly into the process.

$ nvc -r --stop-time=1ms --stats counter_tb
** Note: setup:28ms run:104ms maxrss:17872kB

LLVM JIT compilation accounts for most of the memory usage and 28ms setup time. However this overhead should be insignificant for any long-running simulation.

Just running the above simulation is fairly boring so I’ve also started adding a basic VCD dumper. This only works for a small set of data types but includes std_logic and std_logic_vector so should hopefully be quite useful in practice.

$ nvc -r --stop-time=100ns --vcd=out.vcd counter_tb

The output can then be opened in a VCD viewer such as GTKWave.

Note that writing out a VCD will slow the simulation considerably. In the future I’d like to be able to selectively dump signals and support other formats such as GHW or LXT2.